Department of Electrical Engineering
| Master of Sciences Degree Defense |
Design of a Current Controlled Oscillator, with Improved Features, Emphasizing in Phase Noise Reduction |
Abstract A low voltage and high quality factor active inductor is designed. By biasing bulk terminals to a positive voltage we reduce the supply voltage of design. Adding a feedback resistor made the active inductor to have very high quality factor and an independent inductance and quality factor tuning. The active inductor was simulated with ADS simulator and TSMC RF 0.18 µm CMOS designkit. The active inductor has a quality factor equal to 12370 and supply voltage of 0.8 V and 1.9 mW power dissipation. Moreover, A method to decrease the phase noise of the sinusoidal oscillators is implemented. The method is based on using a dynamic transistor biasing in a typical oscillator topology. This method uses the oscillator impulse sensitivity function (ISF) shaping to reduce the sensitivity of the oscillator to the transistor noise and as a result reducing the oscillator phase noise. This method is used to decrease the phase noise of an active inductor based LC oscillator. An oscillator based on the method shows a phase noise of -101 dBc/Hz at 1MHz offset frequency, thereby showing about 5.5 dB phase noise decreasing in comparison with the reference constant bias topology. This result is obtained from the simulation based on TSMC RF 0.18µm CMOS technology in ADS simulator. |
Student : Mahdi Ebrahimzadeh Advisor : Dr Seyed Javad Azhari Jury: Dr Ayatollahi, Dr Mirzakouchaki and Dr Shamsi |
Date : Sunday 1389/4/6 at 10 AM Place : Seminar Saloon, Electronic Research Center |
